Innovazione e ottimizzazione del processo di galvanica per interconnessione ad alta densità (ISU) Pannelli con elevato rapporto spessore/diametro

Preface

With the rapid development of communication and electronic products, the design of printed circuit boards (PCB) as carrier substrates is moving towards higher levels and denser configurations. High-layer count backplanes or motherboards with thicker boards, smaller holes, and denser routing will see increased demand against the backdrop of continuous technological advancements in information technology, presenting greater challenges to PCB-related manufacturing processes.

Due to the high aspect ratio through-holes (HARTs) in system HDI boards, the plating process must satisfy both HART processing and provide good blind hole plating results, posing a challenge to traditional direct current plating methods. The contradictory requirements of HARTs and blind holes represent the greatest difficulty in plating processes.

Principle Introduction

Solution Composition and Function

— CuSO4

Supplies the necessary Cu2+ for plating, facilitating copper ion transfer between anode and cathode.

— H2SO4

Enhances the conductivity of the plating solution.

— Cl^–

Aids in the formation of the anodic film and dissolution of the anode, improving copper deposition and crystallization.

— Plating additives

Improve the fineness of the plated layer’s crystal structure and deep plating performance.

a.The concentration ratio of copper ions to sulfuric acid and hydrochloric acid in the copper sulfate plating solution directly affects the deep plating capability of through-holes and blind holes.

b.Higher copper ion content results in poorer solution conductivity, i.e., higher resistance, which is detrimental to uniform current distribution. Perciò, for HARTs, a low-copper, high-acid solution system is required.

c.For blind holes, due to poorer solution circulation within, a higher concentration of copper ions is needed to sustain the reaction.

Così, products that feature both HARTs and blind holes present two opposing directions in plating, constituting the difficulty thereof.

III. Experimental Design and Results Analysis

① Product Information

Board thickness: 2.6mm, minimum through-hole diameter: 0.25mm,

maximum through-hole aspect ratio: 10.4:1;

② Blind Holes

1) Dielectric thickness 70um (1080pp), hole diameter 0.1mm

2) Dielectric thickness 140um (2*1080pp), hole diameter 0.2mm

Analysis of HDI plating experimental results based on the aspect ratio

③ Parameter Setting Plans

HDI Electroplating Experimental Plan

Plan One

Direct plating after copper deposition

Utilize a high-acid, low-copper solution ratio with H plating additives; current density 10ASF, plating time 180min.

Direct plating after copper deposition

HDI blind hole plating

1) Dielectric thickness 70um (1080pp), hole diameter 0.1mm: Hole entrance sealed, hole bottom copper thickness 14-16um

2) Dielectric thickness 140um (2*1080pp), hole diameter 0.2mm: Hole bottom crabfeet, thickness 4-5um

— Final open/short test results

This batch had a 100% failure rate in the final open/short test, with a 70% failure rate specifically at the 0.2mm blind hole location (PP 1080*2).

Plan Two

Test using standard plating solution for blind holes followed by through-hole plating:

1) Use VCP for base blind hole plating, standard acid-copper ratio, H plating additives, current density 15ASF, plating time 30min

2) Use a dragon line for thickening, high-acid, low-copper ratio and H plating additives, current density 10ASF, plating time 150min

HDI through-hole plating

HDI blind hole plating

1) Dielectric thickness 70um (1080pp), hole diameter 0.1mm: Hole entrance sealed, hole bottom copper thickness 14-16um

2) Dielectric thickness 140um (2*1080pp), hole diameter 0.2mm: Hole bottom crabfeet, thickness 14-16um

— Final open/short test results

This batch had a 45% failure rate in the final open/short test, with a 60% failure rate specifically at the 0.2mm blind hole location (PP 1080*2).

Comparing the two experiments, the main issue lay with the blind hole plating, validating that the high-acid, low-copper solution system is unsuitable for blind holes.

Perciò, in Experiment Three, we chose a low-acid, high-copper fill hole solution for base blind hole plating, filling the bottom of the blind holes before proceeding with blind hole plating.

Plan Three

Using fill hole plating solution for base blind hole plating followed by through-hole plating:

1) Use fill hole plating solution for base blind hole plating, high-copper low-acid copper ratio and V plating additives, plating parameters 8ASF@30min+12@ASF30min

2) Use a dragon line for thickening, high-acid low-copper ratio and H plating additives, plating parameters 10ASF, plating time 150min

Plating through-hole vias with a conductive base before electroplating

HDI blind hole plating

1) Dielectric thickness 70um (1080pp), hole diameter 0.1mm: Blind hole filled

2) Dielectric thickness 140um (2*1080pp), hole diameter 0.2mm: Blind hole thickness 73.63um

Experimental Design and Results Analysis

Through experimental comparison, different acid-copper ratios and plating additives exhibit varying effects on through and blind hole plating. For HDI boards with high aspect ratios where through and blind holes coexist, it is necessary to find a balance point to address issues with copper thickness inside through holes and crabfeet in blind holes. Such processed surface copper thickness tends to be thicker, often necessitating mechanical brushing to meet outer layer etching requirements.

In the final copper break tests, all three batches showed improvements, with the first and second batches having 100% E 45% failure rates respectively, especially at the 0.2mm blind hole location (PP 1080*2) with failure rates of 70% E 60%, whereas the third batch passed completely without such issues, achieving a 100% pass rate and demonstrating significant improvement.

Closing Remarks

This improvement provides an effective solution for the electroplating process of high aspect ratio HDI boards, but optimization of parameters is still needed to achieve thinner surface copper thickness. It is hoped that this can serve as a valuable reference for peers, offering shortened and more manageable processing procedures for high aspect ratio HDI board manufacturing.